HW/SW Co-Design of a Specific Accelerator for Robotic Computer Vision

Authors

  • Susana Ortega Cisneros Centro de Investigación y de Estudios Avanzados del Instituto Politécnico Nacional
  • Miguel Ángel Carrazco Díaz Centro de Investigación y de Estudios Avanzados del Instituto Politécnico Nacional
  • Adrian Pedroza de la Crúz CINVESTAV - IPN
  • Juan José Raygoza Panduro Centro Universitario de Ciencias Exáctas e Ingenierías, Universidad de Guadalajara
  • Jorge Rivera Domínguez CINVESTAV - IPN
  • Federico Sandoval Ibarra Centro de Investigación y de Estudios Avanzados del Instituto Politécnico Nacional

DOI:

https://doi.org/10.13053/cys-19-3-2253

Keywords:

Accelerator for computer vision, design automation, field-programmable gate array (FPGA), hardware accelerator, hardware design, high performance computing, Linux driver, PCIe framework, Verilog

Abstract

This paper presents an image processing application focused on robotic computer vision. The co-design is divided into three main parts: a hardware accelerator, a PCIe® based framework for HW/SW link, and application software. The implemented accelerator performs preprocessing for facial recognition in order to reduce the workload in the main system processor. The hardware layer is implemented in Altera FPGAs, while the project software layer provides a device driver for Linux to link the user application with the coprocessor. The user application controls the data transfer between the operating system and the device driver. The platform allows rapid prototyping of accelerators, taking advantage of the duality of a programmable hardware and a general purpose processor connected through a PCIe® link. The proposed architecture enables co-design of various image processing algorithms. In this case, the results of the design of an accelerator that performs histogram equalization for contrast correction of color images are presented. 

Author Biographies

Susana Ortega Cisneros, Centro de Investigación y de Estudios Avanzados del Instituto Politécnico Nacional

Received the B.Sc. degree in Communications and Electronics from the University of Guadalajara, Mexico, in 1990, the Master degree from the Center of Research and Advanced Studies of the IPN, Zacatenco, Mexico. Susana Ortega received her Ph.D. degree in Computer Science and Telecommunications from Autonomous University of Madrid, Spain. She specializes in design of digital architecture based on FPGAs, DSPs, and Microprocessors. The main lines of investigation in which she works are digital control, self–timed synchronization, electronic systems applied to biomedicine, embedded microprocessor design, digital electronics, and custom DSPs in FPGAs.

Miguel Ángel Carrazco Díaz, Centro de Investigación y de Estudios Avanzados del Instituto Politécnico Nacional

Currently is a Ph.D. Student in Electric Engineering at the Centre for Research and Advanced Studies of IPN, Zapopan, Mexico. He graduated from the University of Guadalajara, Mexico, in 2010 receiving the M.Sc. in Electronics and Computer Science Engineering. In 2008 he received the B.Sc. in Communications and Electronics Engineering. From 2010 to 2012 he worked as a Component Design Engineer at Intel® Labs Group in the Guadalajara Design Center. His current research work is focused on design of computer architectures for parallel processing and hardware acceleration.

Adrian Pedroza de la Crúz, CINVESTAV - IPN

Received the B.Sc. degree in Communications and Electronics Engineering from the University of Guadalajara, Jalisco, Mexico, in 2008, and the M.Sc. degree in Electronics and Computer Science Engineering from the University of Guadalajara in 2010. From 2010 to 2012 he worked at Intel® as a Component Design Engineer. Currently he is a Ph.D. student in Electrical Engineering at the Centre for Research and Advanced Studies of IPN, Zapopan, Jalisco, Mexico. Nowadays his research focuses in the area of parallel memory architectures for accelerators on hardware.

Juan José Raygoza Panduro, Centro Universitario de Ciencias Exáctas e Ingenierías, Universidad de Guadalajara

Received the B.Sc. degree in Communications and Electronics from the University of Guadalajara, Mexico, in 1989, the Master degree from the Center of Research and Advanced Studies of the IPN, Zacatenco, Mexico. Juan José Raygoza received his Ph.D. degree in Computer Science and Telecommunications from the Autonomous University of Madrid, Spain. From 1996 to 2000, he worked in IBM, participating in the technological transfer of manufacturing hard disk heads at the IBM manufacturing plant San Jose C.A., Guadalajara, Mexico. He specializes in the design of digital architecture based on FPGAs, microprocessors, embedded system, and bioelectronics. The main lines of investigation which he works in are electronic systems applied to biomedicine, microprocessor design, digital control, embedded system.

Jorge Rivera Domínguez, CINVESTAV - IPN

Received the B.Sc. degree from the Technological Institute of the Sea, Mazatlán, Mexico, in 1999, and the M.Sc. and Ph.D. degrees in Electrical Engineering from the Centre for Research and Advanced Studies, National Polytechnic Institute, Guadalajara, Mexico, in 2001 and 2005, respectively. Since 2006, he has been with the University of Guadalajara, Guadalajara, Mexico, as a full-time Professor at the University Center for Exact Sciences and Engineering, Electronics Department. His research interests focus on regulator theory, sliding mode control, discrete time nonlinear control systems, and their applications to electrical machines. He has published more than 40 papers in international journals and conferences and has served as reviewer for different international journals and conferences.

Federico Sandoval Ibarra, Centro de Investigación y de Estudios Avanzados del Instituto Politécnico Nacional

Received the B.Sc. degree in Physics and Electronics from the UASLP in 1988, Mexico, and the Ph.D. in Electronics from INAOE, Mexico, in 1997. During 1991-1996 he was at the Microelectronics Laboratory of INAOE as a researcher developing wet-etching techniques and designing CMOS circuitry for silicon-based microsensors. In 1997 he was at CNM, Bellaterra (Spain), as a visiting researcher being involved in the development of surface micromachining techniques to design a fully integrated microphone. In 1999 he joined CINVESTAV, Guadalajara campus, Mexico. During 2002-2006 he was the coordinator of the Electronic Design Group. His research areas include -based A/D converters for multi-standard communications, design of VCOs for HF applications, and test of analog circuits.

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Published

2015-09-30

Issue

Vol. 19 No. 3 (2015): 19(3) 2015 Thematic issue: Vision and Robotics (Guest editors: S. Ortega, A. Pedroza, O. Carbajal, B. Castillo Toledo)

Section

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